65
votes
4
answers
1.7K
views
Why does Windows64 use a different calling convention from all other OSes on x86-64?
AMD has an ABI specification that describes the calling convention to use on x86-64. All OSes follow it, excep
55
votes
5
answers
2.9K
views
What is the function of the push / pop instructions used on registers in x86 assembly?
When reading about assembler I often come across people writing that they push a certain register of the proce
61
votes
8
answers
2.3K
views
`testl` eax against eax?
I am trying to understand some assembly. The assembly as follows, I am interested in the testl line: 000319d
60
votes
3
answers
2.7K
views
Possible GCC bug when returning struct from a function
I believe I found a bug in GCC while implementing O'Neill's PCG PRNG. (Initial code on Godbolt'
62
votes
5
answers
1.3K
views
Purpose of ESI & EDI registers?
What is the actual purpose and use of the EDI & ESI registers in assembler? I know they are used for stri
51
votes
8
answers
2.3K
views
What is the purpose of XORing a register with itself?
xor eax, eax will always set eax to zero, right? So, why does MSVC++ sometimes put it in my executable
62
votes
3
answers
1.7K
views
What is the meaning of "non temporal" memory accesses in x86
This is a somewhat low-level question. In x86 assembly there are two SSE instructions: MOVDQA xmmi, m128
56
votes
3
answers
2.2K
views
What does `dword ptr` mean?
Could someone explain what this means? (Intel Syntax, x86, Windows) and dword ptr [ebp-4], 0
53
votes
1
answers
1K
views
What is the best way to set a register to zero in x86 assembly: xor, mov or and?
All the following instructions do the same thing: set %eax to zero. Which way is optimal (requiring fewest mac
49
votes
7
answers
2K
views
How does this milw0rm heap spraying exploit work?
I usually do not have difficulty to read JavaScript code but for this one I can’t figure out the logic. The
63
votes
4
answers
974
views
Why do x86-64 instructions on 32-bit registers zero the upper part of the full 64-bit register?
In the x86-64 Tour of Intel Manuals, I read Perhaps the most surprising fact is that an instruction such a
63
votes
12
answers
3K
views
What is the difference between MOV and LEA?
I would like to know what the difference between these instructions is: MOV AX, [TABLE-ADDR] and LEA AX,
65
votes
3
answers
3K
views
How do you use gcc to generate assembly code in Intel syntax?
The gcc -S option will generate assembly code in AT&T syntax, is there a way to generate files in Intel sy
54
votes
4
answers
2K
views
What are the calling conventions for UNIX & Linux system calls (and user-space functions) on i386 and x86-64
Following links explain x86-32 system call conventions for both UNIX (BSD flavor) & Linux: http://www.int
50
votes
3
answers
1.8K
views
Why does GCC generate such radically different assembly for nearly the same C code?
While writing an optimized ftol function I found some very odd behaviour in GCC 4.6.1. Let me show you the cod
56
votes
4
answers
3K
views
Why would introducing useless MOV instructions speed up a tight loop in x86_64 assembly?
Background: While optimizing some Pascal code with embedded assembly language, I noticed an unnecessary MOV i
62
votes
5
answers
2.5K
views
Why does GCC use multiplication by a strange number in implementing integer division?
I've been reading about div and mul assembly operations, and I decided to see them in action by writing a
53
votes
7
answers
1.5K
views
What is exactly the base pointer and stack pointer? To what do they point?
Using this example coming from wikipedia, in which DrawSquare() calls DrawLine(), (Note that this diagram h
50
votes
3
answers
1.7K
views
What is a retpoline and how does it work?
In order to mitigate against kernel or cross-process memory disclosure (the Spectre attack), the Linux kernel1
54
votes
10
answers
1.6K
views
What does multicore assembly language look like?
Once upon a time, to write x86 assembler, for example, you would have instructions stating "load the EDX regis
